The demand for ever faster and more complex signal and data processing in telecoms systems and in other fields of application has fuelled the need for new generations of signal processing systems having multiple high-performance ULSI circuits (e.g. RFPAs, ASICs and FPGAs), which are characterised by their need for multiple low supply voltages, high levels of current demand and tight supply voltage regulation requirements. These needs are met by the so-called Distributed-Power Architecture (DPA) power supply, which may provide a number of tightly-regulated voltages from an input power source via a two-stage voltage conversion arrangement.
FIG. 1 is a schematic of a conventional DPA power supply connected to payload circuitry. The DPA power supply 10 is a power distribution system comprising a front-end AC/DC power supply 20 connected to an AC input power bus 30. The front-end AC/DC converter 20 is connected via an intermediate bus 40 to the inputs of a number (K) of second stage DC/DC power supplies 50-1 to 50-K, which are usually located on a host board 60, close to payload circuitry 70.
In the example of FIG. 1, each of the plurality of DC/DC power supplies 50-1 to 50-K is a buck converter commonly referred to as a “Point-of-Load” (POL) or a “Point-of-Source” (POS) converter. In general, the DC/DC power supplies 50-1 to 50-K may be converters providing isolation, non-isolated regulators or any combination thereof. The DC/DC converter often takes the form of a switched-mode power supply. The POL converters deliver a regulated voltage to their respective loads (functional holding) in the payload circuitry 70.
In order to save energy in the system, it is common to switch ON parts of the payload circuitry only when they are required and to leave them switched OFF at all other times. The variations in the load current caused by this switching require the POL converters' dynamic current handling capability to be improved.
European patent application EP 1 406 373 A1 discloses a Factorized Power Architecture (“FPA”) method and apparatus for supplying power to highly transient loads, such as microprocessors. The apparatus includes a front-end power regulator (PRM) that provides a controlled DC bus voltage which is converted to the desired load voltage using a DC voltage transformation module (“VTM”) at the point of load. The VTM converts the DC bus voltage to the DC voltage required by the load using a fixed transformation ratio and with a low output resistance. The response time of the VTM is less than the response time of the PRM. A first capacitance across the load is made large enough to support the microprocessor current requirement within a time scale that is preferably greater than or equal to the characteristic open-loop response time of the VTM. A second capacitance, at the input of the VTM, is made large enough to support the microprocessor current requirement within a time scale which is preferably greater than or equal to the closed-loop response time of the front-end power regulator. Feedback is provided from a feedback controller at the point of load to the front-end or to upstream, on-board power regulator modules to achieve precise regulation.
Thus the control function within known DC/DC converters, such as that described in EP 406 373 A1, is designed to optimize the converter's output parameters only and, in particular, to minimize deviations in the output voltage. With typical pulse-width modulated (PWM) converters, the only limitation in the control function is the maximum and minimum duty cycle range. Little or no attention has so far been paid to the effect that dynamic loads have on the converter's input current during normal operation. Highly dynamic loads can cause a large ripple to appear in the input current of the converters 50-1 to 50-K, which may make the converter incompatible with current telecom standards for power distribution in a telecom system.
A common approach to ensuring compliance with current telecom standards for input current ripple is to add a relatively large input filter that includes a high capacitance, as indicated at 80 in FIG. 1. However, this has the disadvantage of the size of the filter usually being similar to the size of the DC/DC converter module itself. Size constraints normally force the designer to solve the problem by reducing the adverse effects of the dynamic load in many steps instead of addressing the problem close to its source.
In some applications, such as radio base stations, the radio is located near the antenna and the power feeding is typically done with a long cable that may be 100-300 m in length. This cable will have a high inductance. In these cases, step changes in the input current add a reactive deviation in the supply voltage. Currently, it is normal practice to increase the cable dimensions in order to reduce the voltage deviation effect from the cable. However, the increase in the cable dimensions will increase the cost of the cable.
An alternative solution to reducing the input current ripple to acceptable levels, which requires less space, is to connect an active linear electronic current regulator, built with MOSFETs in combination with capacitors, to the converter's input. This will remove the effect at one compact stage but will give rise to relatively high power losses.
Thus, known approaches to mitigating the effects of highly dynamic input currents have resulted in increased power consumption, increased dimensions and costs of the power converter system.
It should be noted that the problems caused by dynamic current loads are not confined to power supplies in telecom systems. For example, another application where this problem arises is the power supply of electric fans. A modern fan includes a speed controller, which varies the fan speed by a low-frequency PWM function. The current drawn from the power supply will thus consist of a pulse train. A filter at the power supply's input is required in order to meet electromagnetic interference (EMI) requirements.
There is therefore considerable need for an improved power supply which overcomes the deficiencies of the prior art discussed above.